Project description

The exact determination of the neutrino mass in the sub-eV range is one of the most challenging questions in particle physics. The ¹⁶³Ho electron capture experiment ECHo aims to study the electron neutrino mass in the sub-eV range by analyzing the calorimetrically measured energy spectrum after the electron capture process of ¹⁶³Ho. A high-precision and high-statistical spectrum will be measured by means of low-temperature magnetic calorimeter arrays.

A central challenge of the ECHo 100k experiment is the selection of the approximately 6000 detectors. Individual electrical connections to the detectors are not possible due to design and thermal limitations of the cryostat. Therefore, the method of microwave SQUID multiplexing will be applied, which offers the possibility to combine the information content of a multitude of pixels on a single microwave line.

An important part of microwave SQUID multiplexing is the extraction of the individual detector information from the mixed signal and finally the storage of the characteristic event parameters. Essential parts of the processing chain can be realized by a so called Software-Defined Radio (SDR), whose conception and setup for ECHo-100k is the subject of this project.

Our contribution

Subject of our ECHO-100k project is the development and production of a SDR readout electronics for ECHo-100k. This will consist of several independent identical units, each connected to the cryostat via a transmit-receive line pair. Each of these units will cover the complete frequency range from 4-8 GHz, which is relevant for multiplexing. For each electronic system, 400 to 500 channels are possible, so that 12-15 electronic systems are required for the 6000 channels targeted.

Each of the electronic systems consists of an analog microwave electronics for up- and down-mixing of the initial and transmit frequency comb and a mixed-signal backend consisting of DACs, ADCs and FPGAs. The FPGA generates the microwave frequency comb and analyses the received feedback from the cryostat to extract the detector signals. In addition, the FPGA is to generate the flow ramp necessary for the measurement, for which an additional DAC channel is to be provided. The data resulting from the analysis will be transferred via a suitable interface, e.g. Ethernet, to a server (not part of the offer) for storage.